An Introduction to The Intel IA-32 Architecture (EE478)

Programme: 

B.Tech (E&E)

Semester: 

Eighth

Category: 

Programme Specific Electives (PSE)

Credits (L-T-P): 

04(3-1-0)

Content: 

A brief history of the IA-32 architecture, the Intel P6 family of processors – Intel Pentium®, Xeon®, Pentium® M, Pentium® Extreme, Core™Duo and Core™ Solo.  SIMD instructions, Hyper-threading technology, Multicore technology.  Basic execution environment, Memory Organization, Paging and Virtual memory, Address calculations in 64-bit mode. basic program execution registers, Instruction pointer, Operand addressing, memory operands, segmentation, I/O port addressing.  Data types: numeric, pointer, bit-field, string, packed-SIMD, BCD. Implementation of the IEEE 754 floating point format. Overview of FP exceptions and FP exception handling.

Instruction set summary – General purpose instructions, FPU instructions, MMX instructions, SSE instructions, SSE2 and SSE3 extensions. Programming with GP instructions, Programming with the x87 FPU. Instruction prefixes, encoding, displacement. Interrupts and exception handling. Programming the IA-32 in the GNU/Linux environment.

References: 

1. Intel Corporation, IA-32 Intel Architecture Software Developer's Manual, Volume1:Basic Architecture, Intel Corporation, 2006.
2. Intel Corporation, IA-32 Intel Architecture Software Developer's Manual, Volume 2A: Instruction Set Reference, A-M, Intel Corporation, 2006.
3. Intel Corporation, IA-32 Intel Architecture Software Developer's Manual, Volume 2B: Instruction Set Reference, N-Z, Intel Corporation, 2006.
5. Intel Corporation, IA-32 Intel Architecture Optimization Reference Manual, Intel Corporation, 2006.
6. http://developer.intel.com/design/
7. http://www.intel.com/design/archives/
8. http://www.x86.org/intel.doc/

Department: 

Electrical and Electronics Engineering