The ARM Core: Architecture and Programming (EE428)

Programme: 

B.Tech (E&E)

Semester: 

Seventh

Category: 

Programme Specific Electives (PSE)

Credits (L-T-P): 

04 (3-1-0)

Content: 

The ARM design philosophy, ARM processor fundamentals – Registers, Current program status register, pipeline, exceptions, interrupts and the vector table, core extensions, architecture revisions, ARM processor families. The ARM instruction set: Data processing instructions, Branch instructions, Load-store instructions, Software interrupt instructions, Program status register instructions, Conditional execution. The THUMB instruction set, THUMB register usage, ARM-THUMB interworking.

Writing assembly code, Profiling and cycle counting, Instruction Scheduling, Register allocation, Looping constructs, Bit manipulation, Efficient switches,  Handling unaligned data. Using the GNU assembler.

Optimized primitives, Exception and interrupt handling. Rudimentary aspects of embedded operating systems.

References: 

1. David Seal (Ed.), ARM Architecture Reference Manual, 2nd Edition, Addison-Wesley, 2001.
2. Steve Furber, ARM Sytem-on-Chip Architecture, 2nd Edition, Addison-Wesley, 2000.
3. Andrew N. Sloss, Dominic Symes, Chris Wright, ARM System Developer's Guide, Elsevier, 2004.
4. ARM Limited, ARM v7-M Architecture Application Level Reference Manual, ARM Limited, 2006.
5. http://www.arm.com/documentation/
6. http://www.armepos.com/ (requires registration

Department: 

Electrical and Electronics Engineering
 

Contact us

 Vinatha U
Associate Professor and Head of the Department
Department of Electrical and Electronics Engineering
National Institute of Technology Karnataka, Surathkal
Srinivasnagar, Surathkal, Mangalore-575025. Karnataka, India.
Ph : +91-824-2473045
Fax: +91-824-2474039
E-mail: hodee[AT]nitk[DOT]ac[DOT]in

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